Thread (1 message) 1 message, 1 author, 2008-02-21
  • (off-list ancestor, not in this archive)
  • Re: Sample driver · Jeff Mock <hidden> · 2008-02-21

Re: Sample driver

From: Jeff Mock <hidden>
Date: 2008-02-21 06:54:35


fariyaf@gmail.com wrote:
Hi,

Thanks so much for the driver. I have a few doubts.. .may be u cud
help me out with it.... Basically, I am working on the PPC 405EX
processor with a peripheral attached to the EBC. I've requested for
I/O memory & mapped it using ioremap. The following are my doubts:

1) How do I ensure that the memory range that I requested is
non-cacheable. I've to work with non-cacheable memory.  I've
requested for memory using request_mem_region( ).
In my example the memory range is set to non-cacheable, this needs to be 
done if you are talking to real hardware registers:

   "vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);"

static int
pdev_mmap(struct file *file, struct vm_area_struct *vma)
{
     int fpga_num = iminor(file->f_dentry->d_inode) - PDEV_SPCTL;
     phys_addr_t     paddr;

     paddr = fpga_num ? PDEV_SP1_REG : PDEV_SP0_REG;
#ifdef PDEV_DEBUG
     printk("pdev-gxctl: fpga %d reg mmap() at %016llx\n", fpga_num, paddr);
#endif
     vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
     if (remap_pfn_range(vma,
             vma->vm_start,
             paddr >> PAGE_SHIFT,
             vma->vm_end-vma->vm_start,
             vma->vm_page_prot))
         return -EAGAIN;
     return 0;
}
2) Between any consecutive writes or any consecutive reads to the EBC
peripheral, if I introduce a delay of 500msec, the read/write is
completing.  Does this have to do anything with caching? What could
be the  reason for this?

I have no idea where the 500ms delay comes from, this is quite a long 
delay.  Maybe there is some problem with the EBC programming for your 
example.  The EBC is quite flexible and can be programmed in any number 
of insane ways that might cause trouble.

jeff
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