On Mon, 2008-01-28 at 10:23 -0600, Olof Johansson wrote:

Having that described in the patch (or at least in the patch
description)
to make it more clear could be good. That, and the fact that the
mapping
is offset on <32GB memory machines, and thus not really a 1:1 mapping.

It is at an offset still on the PCI bus.

On those, 0...2G will be used to cover the hole, but a different range
higher in the bus space (in 64 bits space) will be use to access the
linear mapping.

Ben.