LPC burst accesses

Hi,

I am in the process of optimizing read accesses to an FPGA in one of our =
custom mpc5200b boards.

I have attempted to do this in two ways, i.e.

1) With the the general SDMA task. Also used by the AC97 audio codec =
driver.
2) Trought the SCLPC fifo offered in relation with the LP bus.

The documentation on freescales site is somehow very vague and even =
though they talk about
read burst accesses they also seem not to be able to guarantee under =
what conditions
burst accesses are generated/not generated. The result that I am seeing =
is that even though=20
that the DMA task and fifo is working as expected (transfering data from =
the FPGA to memory/fifo)
burst reads are _never_ generated (short burst/long burst).

Is there any enlightened soul out there that might shed a litle light on =
this issue or point me into=20
the right direction where I can find more concrete documentation.

I am using linux 2.6.23 as base for these experiments.

rg
kd