Benjamin Herrenschmidt wrote:

quoted

Depends on interpretation. IIRC currently the same die is used for 440EPx and 
440GRx. I could be wrong here though and it is just a bug in the chip. But 
anyway we should support this somehow. Could be that I missed this in the 
current 440GRx (Rainier) arch/ppc support too. I have to admit, that no 
clever solution comes to my mind right away though.

We can always come up with some kind of runtime detection, by turning on
MSR:FP, issuing an fp instruction and catching the illegal instruction
fault if any :-)

Ben.

Is it OK to workaround the GRX/EPX having the same PVR issue using 
device tree?
Say, check the PVR value and if we have 440EPx PVR, but 440GRX node in 
the device tree, fix the cputable entry and omit FPU initialization code.
Thanks,
Valentine.