external IRQ's

Hi all, can someone help me with my external interrupts for the
mpc8548e ? I need to define these interrupts our hardware engineer has
defined:

IRQ0 : PHY 0 - TSEC 1 (P0 of the 88E1121R)
IRQ1 : PHY 1 - TSEC 2 (P1 of the 88E1121R)
IRQ2 : PHY 2 - TSEC 3 (88E1111)
IRQ3 : PHY 3 - TSEC 4 (88E1111)

My questions for kernel 2.6.22 and arch powerpc are:

1) Do I need to define those external IRQ's in both a device tree file
under arch/powerpc/boot/dts and also in C code under
arch/powerpc/platforms/85xx ?

2) I've been told on another list that "External interrupts start at
zero (internal interrupt numbers have 0x10 added to them), so the
first cell should correspond to the external IRQ
number."  I'm having a hard time applying that advice to a MDIO node
and ethernet node in the device tree. For example, the CDS board for
8548 has the following:

mdio@24520 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        device_type = "mdio";
                        compatible = "gianfar";
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
                                interrupts = <35 0>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        ...
};

ethernet@24000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        device_type = "network";
                        model = "eTSEC";
                        compatible = "gianfar";
                        reg = <24000 1000>;
                        local-mac-address = [ 00 E0 0C 00 73 00 ];
                        interrupts = <d 2 e 2 12 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
};

I believe for the 8548 there are 11 external interrupts and 48
software interrupts. So in the mdio example above has the first cell
as '35' - is this a software interrupt?

interrupts = <35 0>;

Can I do the following assuming the same second cell sense and level for PHY0 ?

interrupts = <0 0>;

I'm also not getting the ethernet interrupts in the above cds example:

interrupts = <d 2 e 2 12 2>;

Why start with 'd' and 'e' ?  I noticed many if not all boards do that.

3) For the C code in arch/powerpc/platforms/85xx , I see where 0x10
makes sense for internal interrupts. In my case, can I just do:

mpic = mpic_alloc(np, r.start,
                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        4, 0, " OpenPIC  ");
        BUG_ON(mpic == NULL);

        /* Return the mpic node */
        of_node_put(np);

        /* External Interrupts */
        mpic_assign_isu(mpic, 0, r.start + 0x00000);
        mpic_assign_isu(mpic, 1, r.start + 0x00080);
        mpic_assign_isu(mpic, 2, r.start + 0x00100);
        mpic_assign_isu(mpic, 3, r.start + 0x00180);

Please help!
Robert

robert lazarski wrote:

1) Do I need to define those external IRQ's in both a device tree file
under arch/powerpc/boot/dts and also in C code under
arch/powerpc/platforms/85xx ?

Just in the dts.

2) I've been told on another list that "External interrupts start at
zero (internal interrupt numbers have 0x10 added to them), so the
first cell should correspond to the external IRQ
number."  I'm having a hard time applying that advice to a MDIO node
and ethernet node in the device tree. For example, the CDS board for
8548 has the following:

mdio@24520 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        device_type = "mdio";
                        compatible = "gianfar";
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
                                interrupts = <35 0>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        ...
};

I don't know what version of the dts you're looking at, but the one in 
the current Linux tree has <5 1>, not <35 0>.

I'm also not getting the ethernet interrupts in the above cds example:

interrupts = <d 2 e 2 12 2>;

Why start with 'd' and 'e' ?  I noticed many if not all boards do that.

In the current dts, it's <1d 2 1e 2 22 2>.

It appears that the interrupt numbering was changed not too long ago, 
and that external interrupts used to be numbered above the internal ones.

-Scott

On 8/16/07, Scott Wood [off-list ref] wrote:

robert lazarski wrote:

quoted

1) Do I need to define those external IRQ's in both a device tree file
under arch/powerpc/boot/dts and also in C code under
arch/powerpc/platforms/85xx ?

Just in the dts.

Thanks, I notice in 2.6.23-rc3 there no longer are a series of
mpic_assign_isu() .

I don't know what version of the dts you're looking at, but the one in
the current Linux tree has <5 1>, not <35 0>.

Thanks for pointing that out! 2.6.22.2 has 35 as the interrupt, while
2.6.23-rc3 has 5. 35 didn't make any sense to me since the old ppc
arch used 5.

quoted

I'm also not getting the ethernet interrupts in the above cds example:

interrupts = <d 2 e 2 12 2>;

Why start with 'd' and 'e' ?  I noticed many if not all boards do that.

In the current dts, it's <1d 2 1e 2 22 2>.

It appears that the interrupt numbering was changed not too long ago,
and that external interrupts used to be numbered above the internal ones.

-Scott

Why <1d 2 1e 2 22 2> ? I can't seem to parse these numbers - how do I
know what to use for my external interupts 1,2 for phy's 0,1 using a
88E1121R and for external interupts 3,4 for phy's 2,3 using a 88E1111
?

Thanks!
Robert

robert lazarski wrote:

Why <1d 2 1e 2 22 2> ? I can't seem to parse these numbers

They alternate between IRQ numbers and level/sense information, and the 
IRQ numbers are the internal IRQ number plus 16.

- how do I
know what to use for my external interupts 1,2 for phy's 0,1 using a
88E1121R and for external interupts 3,4 for phy's 2,3 using a 88E1111
?

I thought it was interrupts 0-3, not 1-4?

If, like the CDS board, you have level-triggered active-low phy 
interrupts, then <0 1>, <1 1>, <2 1>, and <3 1>.  If not, then choose an 
appropriate value for the second cell based on booting-without-of.txt.

-Scott

On 8/16/07, Scott Wood [off-list ref] wrote:

robert lazarski wrote:

quoted

Why <1d 2 1e 2 22 2> ? I can't seem to parse these numbers

They alternate between IRQ numbers and level/sense information, and the
IRQ numbers are the internal IRQ number plus 16.

Thanks, The "internal IRQ number plus 16" part is the info I was
lacking. However by 'internal IRQ' do you mean DMA? I just asked the
hardware engineer and that's what he thought you may have meant.

So in '1d'  the first cell is the irq and the second cell is the sense
level, how is the '1' calculated from 'internal IRQ number plus 16' .
Thanks for you patience, I'm just not getting that part yet.

quoted

- how do I
know what to use for my external interupts 1,2 for phy's 0,1 using a
88E1121R and for external interupts 3,4 for phy's 2,3 using a 88E1111
?

I thought it was interrupts 0-3, not 1-4?

It was 0-3 ;-)

If, like the CDS board, you have level-triggered active-low phy
interrupts, then <0 1>, <1 1>, <2 1>, and <3 1>.  If not, then choose an
appropriate value for the second cell based on booting-without-of.txt.

Kool, think I got this part. Do the 0-3 irq's in the mdio node
influence in any way the ethernet nodes irq's - the <1d 2 1e 2 22 2>
in this example ?

Thanks!
Robert

robert lazarski wrote:

On 8/16/07, Scott Wood [off-list ref] wrote:

quoted

robert lazarski wrote:

quoted

Why <1d 2 1e 2 22 2> ? I can't seem to parse these numbers

They alternate between IRQ numbers and level/sense information, and the
IRQ numbers are the internal IRQ number plus 16.

Thanks, The "internal IRQ number plus 16" part is the info I was
lacking. However by 'internal IRQ' do you mean DMA? I just asked the
hardware engineer and that's what he thought you may have meant.

No, I mean interrupts that come from on-chip devices, rather than 
external interrupt pins.

So in '1d'  the first cell is the irq and the second cell is the sense
level, how is the '1' calculated from 'internal IRQ number plus 16' .
Thanks for you patience, I'm just not getting that part yet.

What do you mean, the '1'?

 From table 10-3 of the 8548 manual, the eTSEC1 transmit interrupt is 
internal interrupt 13, or 0xd.  Adding 16 gives 0x1d.

It's (apparently) level-triggered active-high, so the sense is 2, 
according to the table in booting-without-of.txt.

quoted

If, like the CDS board, you have level-triggered active-low phy
interrupts, then <0 1>, <1 1>, <2 1>, and <3 1>.  If not, then choose an
appropriate value for the second cell based on booting-without-of.txt.

Kool, think I got this part. Do the 0-3 irq's in the mdio node
influence in any way the ethernet nodes irq's - the <1d 2 1e 2 22 2>
in this example ?

No.

-Scott