On Jul 31, 2007, at 6:44 AM, Clemens Koller wrote:

Hi, Ansari!

Ansari schrieb:

quoted

Hi Kumar,
First of all thanks for ur reply .
Even i went through the linux source . And i have observe that the =20=

quoted

reboot command used to hard reset the core . I have few doubts can =20=

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u please clarify me.
1. Is there any way to reset the full chip with out using any =20
external signal (MPC8560) ? (like any register that can be used =20
for reseting the processor)

I RTFM:
It should be the bits RST[1:0] in the Debug Control Register 0 =20
(DBCR0).

This only resets the core on the 8560.

I didn't find details how the external signals are affected: =20
HRESET_REQ# and friends.
The HRESET_REQ# is usually fed back to the CPU's HRESET#.
So if the HRESET_REQ# gets asserted by writing to above registers =20
it should really bring
down the CPU, it's internal as well as it's external components, =20
which are usually
connected to a replication of that signal.

This is roughly correct.  The only way on 8560 to generate =20
HRESET_REQ# is to cause a core watchdog timeout.

However the existence of cpm2_reset() and a qe_reset() (QuiccEngine?)
in the code tells me that the above expectations could be wrong.

Would be nice to have that verified by some hardware guys from =20
freescale...

cpm2_reset/qe_reset are more related to SW than any HW reset.

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2. Even same reboot command works fine for MPC8540 Processor ?.

...because it doesn't have a cpm ?

That's more luck than anything else.

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3. what are the factors that makes ramdisk hangs . When its =20
uncompressing ?

Well, side effects ?

Regards,
--=20
Clemens Koller
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