RE: Follow up on 4 Gig of DDR on MPC8548E
From: Morrison, Tom <hidden>
Date: 2007-06-25 23:12:07
quoted
0x0000_0000 to 0xffff_ffff or do you have 64GB of mem...
4 GIG DDR Memory...that we say...there is 3 GIG for the moment... =20 the LAW's are setup in priority order - thus, if you have overlapping regions (aka: PCI & DDR memory) the one with the lower #'d LAW is the one it is mapped to....
quoted
If you have all physical mem in the first 32bit, where are your PCI windows set? And in modst cases the PCI devices (if they are bus-mastring ) need =
1-1
quoted
inbound mapping to be able to write to memory.
you can use the LAW's to remap anything to anywhere... see above for priority - but in our case, we are mapping the PCI/PEX/Local Bus to the last 4 GIG at a higher=20 priority LAW than the DDR...that is what the MPC8548=20 spec says how it works...and it does - if you don't tell the kernel there is more than 2GIG (and ioremap that last GIG to access the full 'other' 2 GIG... =20 that is not the issue here.... =20 apparently after more investigations - it looks like there is something = in the ext2 driver code that is mal-adjusted....I haven't talked to the guy today who was = looking at that - but the ext2 driver code that was openning a 'virtual file' / console - had some = problems mapping that space - again, my gut is telling me more stronger there is a problem = with signed/unsigned... now deeper in the ext2 code... Am at the Freescale Technical Forum the next few days - if any of you = guys are down here in Florida...I am intending to track down a few freescale = folk on this issue...:-) =20 Tom