On Wed, 2006-12-13 at 12:23 -0600, Olof Johansson wrote:

On Wed, 13 Dec 2006 21:40:03 +1100 Michael Ellerman [off-list ref] wrote:

quoted

To support MSI on MPIC we need a way to reserve and allocate hardware irq
numbers, this patch implements an allocator for that. It looks like we'll
end up with several backends based on the MPIC, so the allocator is attached
to the struct mpic, not the msi backend.

Signed-off-by: Michael Ellerman <redacted>

quoted

+static void mpic_msi_auto_reserve_hwirqs(struct mpic *mpic)
+{
+	irq_hw_number_t hwirq;
+	struct irq_host_ops *ops = mpic->irqhost->ops;
+	struct device_node *np;
+	int flags, index, i;
+	struct of_irq oirq;
+
+	/* Reserve source numbers we know are reserved in the HW */

How do we know? Reserved on what HW? Sure looks system/platform
dependent to me.

quoted

+	for (i = 0;   i < 8;   i++)
+		__mpic_msi_reserve_hwirq(mpic, i);
+	for (i = 42;  i < 26;  i++)

             ^^^^^^^^^^^^^^^

Is this some sort of check to see if we're awake? :)

This code in MPIC currently is only ever used on U3/U4 and so that code
reserves IRQs we know are used for U3/U4 internal IRQs and not available
for HT interrupts (or MSIs). The code, then, does a second pass also
exclusing all IRQs for all devices in the device-tree.

This is a "hack" that works until device-trees provide the right
property we have defined for mpic to indicate what range of irqs is to
be used for MSIs.

Ben.