On Wed, 2006-11-29 at 19:10 -0800, Muruga Ganapathy wrote:

The error message might be due to the wrong/improper configuration of 
interrupt and its attributes like whether it is level/edge sensitive.

G.Muruganandam

Thanks Ganapathy.  Turns out it was a hardware problem.  In True IDE
mode the CF interrupt signal is active high, which explains why
sometimes the interrupt was detected (albeit not at the right time).  We
missed that in the Toshiba document, and unfortunately it doesn't look
like the polarity of IRQ lines is configurable on this CPU.  Alas,
another white wire.

regards,
Ben