Peter Mendham wrote:

alayrac wrote:

quoted

<----> I have a few questions, I was wondering if someone could help me
<----> out:
<----> 
<----> 1) I don't really understand how the kernel image gets loaded from
<----> the .ace file.  I've seen articles which say that the SystemAce
<----> controller puts the kernel image directly into RAM, but on
<----> inspection of the datasheet I can't see any capability other that
<----> JTAG programming and acting as a slave to a processor.  Can anyone
<----> explain the way this works?

XACCACE can load an ace file from a FAT16 partition into the FPGA fabric
using boundary scan chain (JTAG).

First of all it loads the FPGA fabric, the bitsream file. If you have a
look in Applications in the ML405 project there should be a bootloop
code marked as activated and as used to initialized BRAM. 
This code is loaded at address 0xFFFFFFFC (where there is a BRAM) wich
is the reset address of the powerpc. Thus after bitstream dowload, the
powerpc is in an infinite loop so that it won't try to access any
peripheral, especially memory.

Then systemeace will downlaod the elf file, in your case the kernel
image (it could be standalone apllication as well as uboot).

To do so the systemace take controle of powerpc through jtag chain (just
as you are dowing with the JTAG cable when you are debugging you code on
powerpc inside the FPGA). In fact the FPGA fabric include a JTAG daisy
chain, so that the PowerPC is seen on JTAG chain after FPGA
initialization (if you start an xps design from scratch you will see in
the wizard that you can select the debug chain of your powerpc from JTAG
or stub...)

So just to finish, as soon as system ace can see the PowerPC through
JTAG, it can see and use all powerpc peripherals and espaecially the
memory in your case. So it read the destination address of the elf image
to laod (from the elf file itself) and just copy the data at the
specific address. Then it put the PC at this address and sart the
powerpc.
  

Wow.  Thanks Chris, that makes a lot of sense, although I had no idea 
that the SystemAce chip was quite so clever.  I take it that the 
bitstream in the .ace file is specially constructed by the tools to do 
the DRAM download?  What is it that produces the text:
loaded at:     00400000 004E21E4
board data at: 004DF13C 004DF154
relocated to:  00405660 00405678
zimage at:     00405C25 004DE92F
avail ram:     004E3000 04000000
I have always assumed that it is a piece of software that does this.  Is 
that correct?

This is from the bootwrapper code (arch/ppc/boot/simple/)

Thanks very much for replying, the information is really helpful.
-- Peter

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