Thread (6 messages) 6 messages, 4 authors, 2006-08-28

RE: Cache coherency question

From: Liu Dave-r63238 <hidden>
Date: 2006-08-28 03:17:39

Ah.  This must be the problem.  I have a few PCI devices, and=20
on one of them it looked like snooping was working.  I just=20
assumed the other device was setup correctly.
Why one is looked like snooping was working, and the other device
not working?
quoted
Also, you can define the CONFIG_NOT_COHERENT_CACHE, then you are=20
assuming The system has not hardware coherency. You need use the=20
software to keep the cache coherency.
=20
=20
I tried this, and got compiler errors.
What is the file got compiler errors? I notice that the
/ev64360_defconfig
Did define CONFIG_NOT_COHERENT_CACHE.

I added some inline assembly dcbi/dcbf (invalidate/flush)=20
instructions to the particular code in question, and the=20
problems went away.  So definitely a cache problem.  As I=20
said above, defining CONFIG_NOT_COHERENT_CACHE causes=20
compiler errors, so I'm going to look into this more.  I=20
suppose whatever file implements the=20
include/linux/dma-mapping.h stuff isn't BSP specific, so its=20
probably just not being compiled in?  Will look into it.
Somebody said from maillist. The bridge MV64360 seems
having some issue about cache coherent. I don't know if it is really?

-Dave
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