Re: PowerPC Local Bus

Fredrik Roubert wrote:

Hi!

I'm about to write drivers for some FPGA's that are connected to the
local bus of a PowerQUICC II Pro processor and use the user-programmable
machines (UPM's) to transfer data over the bus. What code does already
exist for Linux to help me with this? In the stock kernels, I can't even
find a structure definition for the registers of the local bus
controller, but it seems strange that no-one has written such code
before me. Will I really have to write everything from scratch, or what
code is there that I don't know about yet?

Cheers // Fredrik Roubert

Hi Fredrik,

I'm going to working on something similar soon. If you want
to discuss it off-list, feel free to. We can report the
results back to the list once we have something working.

This is something that can either go in U-Boot or Linux. The
UPM looks fairly easy to setup. Freescale has a UPM programming
tool that allows you to setup waveforms for the single-read/write
and burst-read/write sequences. I was going to connect up
an FPGA to the MPC8349E-MDS local bus (using the unloaded
SDRAM pads) and then capture logic analyzer traces of the
transactions.

I plan to setup a burst mode interface to an FPGA. Actually,
I'll probably decode one chip select to non-burst registers,
and another to burstable memory.

Like I said, we can chat off-list if you like since this discussion
will not be of general interest (but if anyone thinks this should
stay on-list, let me know, and we'll discuss it here).

What FPGA family are you using? I'll be attaching an Altera
Stratix II FPGA onto the local-bus.

Dave Hawkins
Caltech.