quoted
/*
- * SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above.
- * However we disable it on all POWER4 until we verify it works
- * (I was seeing some strange behaviour last time I tried).
- *
- * It has been verified to work on POWER5 so we enable it there.
- */
The patched code doesn't handle GQ at all. Is this on purpose? Add a
similar comment to the CPU feature tables perhaps?
Yeah, those bits are bust on POWER4+. We didn't touch them previously
and we still don't with this patch.
You're right, we should keep that comment. I'll update and retransmit.
Mikey