Thread (14 messages) 14 messages, 2 authors, 2006-01-20

Re: AGPGART driver for ArticiaS - ioremap() problem

From: Gerhard Pircher <hidden>
Date: 2006-01-17 08:37:58

quoted hunk ↗ jump to hunk
--- Ursprüngliche Nachricht ---
Von: Benjamin Herrenschmidt [off-list ref]
An: Gerhard Pircher [off-list ref]
Kopie: linuxppc-dev@ozlabs.org, debian-powerpc@lists.debian.org
Betreff: Re: AGPGART driver for ArticiaS - ioremap() problem
Datum: Tue, 17 Jan 2006 10:18:15 +1100
quoted
Ah, okay. So at least the approach to use the Uninorth code was a step
in the right direction. But that requires changes in the DRI and X
server code, right?
Not you shouldn't... there are 2 different things here. One is how you
access the GART table itself. One is how you access the AGP memory (the
memory that is bound to the GART).

I'm not 100% sure what of the 2 above cases triggered an error with
ioremap, I'm not sure what approach should be used, because i don't know
what your chipset does.
That's the problem: we don't have the datasheet for the ArticiaS. :-( 
But the driver initializes correctly with the Uninorth code now and with the
DRI/DRM code changed. (The code in drm_vm.c checks for Apple's PCI vendor
ID. Therefore I just added a check for MAI's PCI vendor ID.) But the X
server freezes after the login screen is displayed (IIRC the mouse still
works, but the keyboard is dead!?).

BTW: A "agp_special_page" is reserved in init.c. Is this page necessary for
the DRI/DRM drivers to work with the Uninorth driver? I enabled this code
snipped for the AmigaONE too to be on the safe side. :-)
I would need more infos about the hw there. But the basic idea is:

 - For the GART table, you don't need to ioremap it (which is generally
a way to have it non-cacheable I suppose). You can just flush cache
entries after populating them (see uninorth_insert_memory(), it flushes
first the pages that are being inserted in the GART as AGP memory is not
cacheable neither, and at the end of the function, flushes the GART
entry proper).
There may be another problem: it seems that it is not possible to flush the 
TLB cache of the ArticiaS with a specific register setting. At least MAI
didn't specify a bit for this purpose in the code. I have to do some reverse
engineering here. :-)
 - The AGP aperture itself. The main issue there is wether your chipset
makes the AGP aperture visible to the CPU or not. The Apple UniNorth one
doesn't for example, it;'s only visible to the graphic chip. That is why
the uninorth driver sets cant_use_aperture to 1. That forces the DRM to
generate AGP mappings by using the real memory pages and putting them
together into a virtual mapping instead of doing a direct mapping of the
AGP aperture on the bus. Most x86 chipsets however _can_, thus a simple
remapping of pages is enough.
Good question! How would I have to modify the Uninorth driver to use a
direct mapping of the AGP aperture on the bus?

Thanks!

Gerhard

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