On Sep 8, 2005, at 4:08 PM, Pantelis Antoniou wrote:
On Friday 09 September 2005 00:02, Becky Bruce wrote:
quoted
So,
in include/asm-ppc64/cacheflush.h is the following:
static inline void flush_icache_range(unsigned long start, unsigned
long stop)
{
if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
__flush_icache_range(start, stop);
}
On the 32-bit side, we don't need the feature test -
CPU_FTR_COHERENT_CACHE is only defined in 64-bit land, and has
bits set
in the upper 32.
Oh yes we need it. 8xx is non coherent.
I think she lost the I in ICACHE... its a power5 only feature at this
point.
- kumar