Re: [PATCH] cpm_uart: Route SCC2 pins for the STx GP3 board
flat view
From: Andrew Morton <hidden>
Date: 2005-06-02 22:36:41
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Matt Porter [off-list ref] wrote:
quoted hunk ↗ jump to hunk
+++ uncommitted/drivers/serial/cpm_uart/cpm_uart_cpm2.c (mode:100644)@@ -134,12 +134,21 @@ void scc2_lineif(struct uart_cpm_port *pinfo) { + /* + * STx GP3 uses the SCC2 secondary option pin assignment + * which this driver doesn't account for in the static + * pin assignments. This kind of board specific info + * really has to get out of the driver so boards can + * be supported in a sane fashion. + */ +#ifndef CONFIG_STX_GP3 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; io->iop_pparb |= 0x008b0000;
Silly question: why is this driver using a volatile pointer to memory-mapped I/O rather than readl and writel?