Re: I2C/SPI/SMC relocation patch works for both SMC 1 and 2?

In message [ref] you wrote:

quoted

It relates to the SMC which parameter RAM  location  is  in  conflict
with the SPI/I2C parameter RAM, i. e. SMC1.

huh?  what does SMC1 relocation have to do with either of I2C or SPI? 

Ooops. You are right. Please s/SPI\/I2C/SCC2  ethernet/  !  Before  I
tell  more  such  nonsense  let's  quote  the  description that comes
included with  the  patch:  "model  allows  concurrent  operation  of
Ethernet  and  SMC(UART)  and  I2C/SPI  by  solving the parameter RAM
conflict caused by the fact that  some  of  the  Ethernet  parameters
overlay the SMC(UART) and I2C/SPI parameters."

i don't see how SMC1 can be "in conflict with the SPI/I2C parameter 
RAM" as you claim.  can you explain that?

If you use SCC2 for ethernet, it's parameter RAM will use  the  DPRAM
from  offset  3E00  to  offset  3EA4;  without  relocation  the  SMC1
parameter RAM uses offsets 3E80 to 3EB4, thus you have a conflict for
the 3E80...3EA4 area.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
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