Stephan Linke wrote:
quoted
After all is it realy neccessary to use invalidate_dcache range before giving the transmit buffer to the DMA?
The logically correct cache operation is to invalidate an incoming buffer
after the DMA has completed
Yes, but you still need to invalidate the buffer before also or invalidate it when the buffer is freed which
may be possible if you are using your own buffer mgmt.
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