RE: dcache and 8260_io/fcc_enet.c

I noticed that fcc_enet_start_xmit() does not flush the transmit data before
setting up the transmit buffer descriptor. I get the impression that this is
not necessary. But I don't understand why. I have spent the morning looking
through code and Motorola docs and am non the wiser.

That's because the 8260 CPU understand the CPU caches and, while the 8xx does not
and therefore needs a flush_dcache_range().

    Jocke

Thanks
Dean

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/