For 2), you need the same as for 1), plus have the kernel
generate a signal on every Nth occurence of some event.  The
PowerPC generates an exception for that, so this is not all
that hard either.  Maybe the kernel can communicate which PMC
set off the signal; if not, it's trivial for the userland to
figure that out from the current counters.

Hrm... you should check the various CPU erratas, I think
the perf. counter exception suffers from the same bugs
the thermal exceptions has regarding clashing with DEC
and thus losing exception context information on some
G4s. If this is the case, that would basically prevent
using it.

Ben.


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