acurtis@directvinternet.com wrote:
> .... it should be implemented like the 8xx
and 4xx processors, which it isn't without the conditional compiles.
No, it shouldn't. The 4xx/8xx are unique because of the way they
have to map memory in support of cache coherent (i.e. uncached)
windows. The 82xx processor family is a standard cache coherent 6xx
core and doesn't require any special software support.
8260 memory translations were broken in HHL 2.0 (Linux 2.4.2) Just making
sure it isn't still broken in 2.4.17
How were they broken?
Thanks.
-- Dan
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