I learned ppc603 software hash table some extent. And I finally
noticed the bug in current arch/ppc/mm/ppc_mmc.c. In old code, there
was blr at hash_page[0] and did flush_icache_range() from hash_page[0]
to hash_page[1]. But in current code, this code is removed when
comparing CPU_FT_HPTE_TABLE.
Adding this to current ppc_mmu.c have solved random crash both in
Nubus Performa and UMAX C500. And isync before tlbie and mtsrin seems
to be not necessary.
Good catch !
We'll fix it asap.
Ben.
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