No Input from SMC1 on MPC860T - Resolved

I wrote to the list about a month ago with a problem I experienced while
porting Linux 2.4.18 to a custom MPC860T based board.  The problem related
to the console port SMC1.  The console worked fine in PPCBoot, but once in
Linux the console would output data.  The bash/sash shell could not see
input from SMC1.

My associate Stephanie Lockwood solved the problem.  In her words:

After much tracing through kernel source and an insightful comment from
my husband (who happens to be a diagnostics engineer), I now have a
kernel with reliable terminal input.
The key was to not enable the FRZ signal when setting up the timerbase;
apparently I was getting a spurious freeze signal which was turning off
my timer interrupts partway through. The keyboard interrupts kept
coming, but the back-end routine to drain the buffer into the user
program stopped running.

I felt this info might be useful to others involved in porting the latest
kernel to new hardware.


Here is the patch:

--- arch/ppc/kernel/m8xx_setup.c.old        Fri May 10 16:07:23 2002
+++ arch/ppc/kernel/m8xx_setup.c        Mon May 13 19:05:11 2002

@@ -184,10 +184,12 @@
          * (or from the other point of view, to get decrementer interrupts
          * we have to enable the timebase).  The decrementer interrupt
          * is wired into the vector table, nothing to do here for that.
+         *
+         * Do NOT enable the FRZ signal, it stops timer intr -- SJL
          */
         ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr =
                                 ((mk_int_int_mask(DEC_INTERRUPT) << 8) |
-                                         (TBSCR_TBF | TBSCR_TBE));
+                                         TBSCR_TBE);

         if (request_8xxirq(DEC_INTERRUPT, timebase_interrupt, 0, "tbint",

NULL) != 0)
                 panic("Could not allocate timer IRQ!");


Regards,
Daris Nevil
Simple Network Magic Corporation


--


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Daris A Nevil wrote:

quoted

The key was to not enable the FRZ signal when setting up the timerbase;
apparently I was getting a spurious freeze signal which was turning off
my timer interrupts partway through.

If you are getting a "spurious freeze" signal, wouldn't you consider
something amiss with your hardware design or SIU/debug configuration?
If the timers are responding to a freeze condition, so is the rest
of the processor core, which isn't a good thing unless you are actively
debugging.

Please do not apply this patch, but rather find the cause of the real
problem since I prefer to freeze the timers while debugging.


	-- Dan


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