L1 & L2 cache guidelines
From: <hidden>
Date: 2002-04-15 15:16:19
From: <hidden>
Date: 2002-04-15 15:16:19
Hello, we are working with the IBM 750cxe processor and it has both an L1 and L2 cache. We are cutting our teeth on this stuff and we are wondering about handling cache operations between the two. Are there general things that shouldn't be done? Good practices? Any hints etc... would be appreciated. Thanks, John ** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/