RE: linux-2.4.18 & copy-back cache mode

You will have to whip up a set of UPM words specific for you SDRAM. Wolfgang told me this a million times before I finally got my SDRAM working. Look at your SDRAM datasheet and you should be able to figure out the timing.

Also, there is utility from Motorola `MCUinit 3.1` that has a GUI interface to whip out all the timing for you memory controller. Search for it in google and you should be able to download it.

Navin.


In message [ref] Wojciech Kromer wrote:

quoted

Browse the PPCBoot sources;  I  added  a  configuration  for  TQM8xxL
modules   at   66   MHz  (cpu-bus  1:1)  recently;  also,  the  LWMON
configuration runs at 66 MHz 1:1.

OK, thank You. But this UPM table dosen't seem to work with my DIMM.

Probably not. The whole initialization depends  on  the  actual  chip
types; it's Micron SDRAM in our case.

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd@denx.de
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