Are you using a custom UPM table?  This can happen when your UPM burst
table is not proper.  Since bursts are not used by the core until
caching is disabled, problems usually come from the UPM table.

Daniel Wu wrote:

Hi,

Thanks to all who responsed to my last qeustion. The problem was that the immr
was not setup correctly. Also since it is a custom board (MPC860T based), I had
to rewrite code to fill in the bd_t structure. The board is now sending
characters to the console, which is good but I still have one of the original
problems: I can only step through the code using the BDM debugger, but when I
run the code, it generates a software emulation exception and stops.

After some investigation, it seems that I can run the code up to the point
where the instructure cache is enabled - actually only a few lines at the top
of the startup code. My question is: are there any restrictions on when the
cache can be enabled? Are there anything else I've missed.

Thanks,
Daniel

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