Hi Ben,
I looked and the aty128fb.c does not do anything with the MCLK value so I never
bothered to calculate it.
So assuming OF sets the PLL registers properly (and it did on my B+W G3 rev2
and my brand new G4 with Rage128Pro), this patch calculates the XCLK and reads
the reference divider for the VCLK but does not set X_MPLL_REF_FB_DIV at all.
The patch is attached.
By the way this patch works fine on my B+W G3, let's hope it will work fine for
you and others. If so, I will create a similar patch for xf400 and give
that to Kostas to submit to xfree86.org.
Kevin
--
Kevin B. Hendricks
Associate Professor of Operations and Information Technology
Richard Ivey School of Business, University of Western Ontario
London, Ontario N6A-3K7 CANADA
khendricks@ivey.uwo.ca, (519) 661-3874, fax: 519-661-3959