On Tue, 16 Feb 1999, Gabriel Paubert wrote:

On Mon, 15 Feb 1999, David Edelsohn wrote:

quoted

	As Gabriel correctly explained, a "sync" instruction may be
necessary before interrupts are enabled if some off-chip operation, like
modifying an interrupt controller on the bus, was performed.  That is
because of the bus operations which need to complete before interrupts can
be enabled, not because of the enabling itself.

Actually I have come to the conclusion that the best way to handle this is
to add a sync instruction in the mask/disable interrupt routines (the ones
that access the interrupt controllers), so that all following __cli/__sti
only need to access the MSR (for enable/unmask you don't care to
synchronize of course).

Then do we need sync in the OpenPIC routines, too?

Greetings,

						Geert

--
Geert Uytterhoeven                     Geert.Uytterhoeven@cs.kuleuven.ac.be
Wavelets, Linux/{m68k~Amiga,PPC~CHRP}  http://www.cs.kuleuven.ac.be/~geert/
Department of Computer Science -- Katholieke Universiteit Leuven -- Belgium


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