On 2021-07-13 22:15, sean.wang@mediatek.com wrote:
From: Sean Wang <sean.wang@mediatek.com>
PHY offset in either .hw_value or .hw_value_short for mt7615, mt7663,
mt7915 and mt7921 device all start at bit 6, not 8.
Suggested-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Unfortunately this patch causes a few regressions.
Since tx and rx handling is different in their use of the PHY mode bits,
the PHY part should of hw_value should be masked out when filling the tx
rateval. There are a few places in the code that rely on the fixed shift
of 8, including the generic function mt76_get_rate.
This patch should be dropped, and the bit offset differences dealt with
in the other patches of this series.
I will send an updated version
- Felix