.. replying to this after having not slept for > 24 hours, thanks to
being in transit between the US and Western Australia..

On 20 November 2011 15:56, Nick Kossifidis [off-list ref] wrote:

Since we dont read a snapshot of the interrupt
registers it might be possible to get a new interrupt
while reading them. In this case we should make sure
that we clear all SISR bits we get from PISR.

Just to be clear, you _shouldn't_ clear the secondary status mask bit
in the primary status register when you write back 1's to the primary
ISR.
Clear the bits that you read in the secondary status registers. If you
clear the relevant bit in the primary status register then you may
also skip perfectly valid interrupts.

You don't need to check the secondary registers and the primary ISR
bits for consistency. Just read what I did in freebsd-head :
src/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c . it works fine.


Adrian