Re: usb: dwc2: gadget: high-bandwidth (mc > 1) status?

Hi Pavel,

On 11/24/2021 11:39 AM, Pavel Hofman wrote:

Hi Minas at all,

Please does dwc2 (specifically in BCM2835/RPi) support HS ISOC multiple 
transactions mc > 1 reliably? I found this condition 
https://urldefense.com/v3/__https://elixir.bootlin.com/linux/v5.16-rc2/source/drivers/usb/dwc2/gadget.c*L4041__;Iw!!A4F2R9G_pg!MMNE6CYvWEFeWt8W9pImwNA-N4_04U8UsBWQmu9O9Bwq1HalCAupyb9kzGBAOOMlKmt6xefz$ 

     /* High bandwidth ISOC OUT in DDMA not supported */
     if (using_desc_dma(hsotg) && ep_type == USB_ENDPOINT_XFER_ISOC &&
         !dir_in && mc > 1) {
         dev_err(hsotg->dev,
             "%s: ISOC OUT, DDMA: HB not supported!\n", __func__);
         return -EINVAL;
     }

But I do not know how the Descriptor DMA is critical and whether 
disabling it will affect gadget performance seriously.

I know about the RX FIFO sizing requirement (and TX FIFO too I guess), 
the current default values can be increased for that particular use case 
if needed.

I am trying to learn if it made sense to spend time on adding support 
for high-bandwidth to the UAC2 audio gadget  to allow using larger 
bInterval and mc=2,3 at high samplerates/channel counts (sort of "burst 
mode" similar to UAC3). When doing some CPU-demanding DSP it would help 
to avoid the time-critical handling every 125us microframe. Both OUT and 
IN are important.

According programming guide:

"Isochronous OUT Transfers
The application programming for isochronous out transfers is in the same 
manner as Bulk OUT transfer sequence, except that the application 
creates only 1 packet per descriptor for an isochronous OUT endpoint.
The controller handles isochronous OUT transfers internally in the same 
way it handles Bulk OUT transfers, and as depicted in Figure 10-28.
If the transfers are for a high-bandwidth endpoint (more than one MPS 
per μframe ), create as many descriptors as the number of packets in a 
μframe (number of descriptors = number of packets per μframe).
Maximum number of descriptors per μframe per endpoint is three."

To program descriptors to start HB ISOC OUT there are no any problem. 
Problem occurs on completions. If, for example mc > 1, driver will 
allocate and program mc * (request count) descriptors. If host send mc 
packets per frame then every mc descriptor perform request completion is 
not big problem. But if host will send less than mc packets in frame 
then not clear how to exclude unused descriptors from desc chain which 
already fetched by core - by stop transfers (disable EP) and re-start 
transfers (fill again desc chain) from next frame? Or purge unused descs 
and shifting descriptors "up" in a chain? You can try to implement.

Thanks,
Minas

Thanks a lot for your expert advice.


Best regards,


Pavel.