[v4] usb: dwc3: core: Enable AutoRetry feature in the controller
From: Anurag Kumar Vulisha <hidden>
Date: 2018-07-27 07:41:45
Also in:
lkml
Subsystem:
designware usb3 drd ip driver, the rest, usb subsystem · Maintainers:
Thinh Nguyen, Linus Torvalds, Greg Kroah-Hartman
By default when core sees any transaction error(CRC or overflow) it replies with terminating retry ACK (Retry=1 and Nump == 0). Enabling this Auto Retry feature in controller, on seeing any transaction errors makes the core to send a non-terminating ACK transaction packet (that is, ACK TP with Retry=1 and Nump != 0). Doing so will give controller a chance to recover from the error condition. Signed-off-by: Anurag Kumar Vulisha <redacted> --- Changes in v4: 1. Changed the patch subject Changes in v3: 1. As suggested by Felipe, added OTG related check 2. Corrected the multi-line commenting format Changes in v2: 1. As suggested by Rob Herring & Felipe Balbi removed the quirk logic and setting the AutoRetry bits unconditionally for hostmode --- drivers/usb/dwc3/core.c | 16 ++++++++++++++++ drivers/usb/dwc3/core.h | 3 +++ 2 files changed, 19 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 1038075..bc9e33c 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c@@ -883,6 +883,22 @@ static int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } + if (dwc->dr_mode == USB_DR_MODE_HOST || + dwc->dr_mode == USB_DR_MODE_OTG) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + + /* + * Enable Auto retry Feature to make the controller operating in + * Host mode on seeing transaction errors(CRC errors or internal + * overrun scenerios) on IN transfers to reply to the device + * with a non-terminating retry ACK (i.e, an ACK transcation + * packet with Retry=1 & Nump != 0) + */ + reg |= DWC3_GUCTL_HSTINAUTORETRY; + + dwc3_writel(dwc->regs, DWC3_GUCTL, reg); + } + /* * Must config both number of packets and max burst settings to enable * RX and/or TX threshold.
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 285ce0e..92a1077 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h@@ -227,6 +227,9 @@ #define DWC3_GCTL_GBLHIBERNATIONEN BIT(1) #define DWC3_GCTL_DSBLCLKGTNG BIT(0) +/* Global User Control Register */ +#define DWC3_GUCTL_HSTINAUTORETRY BIT(14) + /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24)