[Resend: my first reply went out as a private message to Steve only,
due to a local git send-email config quirk that dropped the Cc list.
Re-sending now with the original cc list so the discussion is
on-record. Sorry for the duplicate, Steve.]

On Wed, 27 May 2026 11:30:28 -0400
Steven Rostedt [off-list ref] wrote:

So basically RISCV has the same problem as ARM64 with patchable
entries. As this may happen for other archs in the future, I would like
to group them together like this:

[...]

does the above work for you? (Although I didn't even compile test it).

Yes, this is clearly better - a single grouped block makes future
patchable-entry architectures trivial to add. I will fold it into v2
with two small adjustments to keep it compiling cleanly:

  - s/case RISCV/case EM_RISCV/ (two places).
  - Put the shared "before_func = 8" on its own line under
    case EM_RISCV: with a standard /* fallthrough */ comment,
    otherwise GCC -Wimplicit-fallthrough warns between EM_AARCH64
    and EM_RISCV.

Resulting switch:

	switch (elf_map_machine(ehdr)) {
	#ifdef MCOUNT_SORT_ENABLED
	case EM_AARCH64:
		sort_reloc = true;
		rela_type = 0x403;
		/* fallthrough */
	case EM_RISCV:
		/* arm64 and RISC-V place patchable entries before the function */
		before_func = 8;
	#else
	case EM_AARCH64:
	case EM_RISCV:
	#endif
		/* fallthrough */
	case EM_386:
	case EM_LOONGARCH:
	case EM_S390:
	case EM_X86_64:
		custom_sort = sort_relative_table_with_data;
		break;

Built scripts/sorttable with the kernel host build (both with and
without MCOUNT_SORT_ENABLED), no warnings. I'll add your Suggested-by
and send v2 shortly.

Thanks!
Wang Han