Thread (17 messages) 17 messages, 2 authors, 2021-10-06

Re: [PATCH v4 2/7] dt-bindings: memory: lpddr2: Convert to schema

From: Krzysztof Kozlowski <hidden>
Date: 2021-10-06 10:57:09
Also in: linux-devicetree, lkml

On 06/10/2021 01:00, Dmitry Osipenko wrote:
quoted hunk ↗ jump to hunk
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-*
compatibles since they were never used by device-trees and by the code.

Suggested-by: Krzysztof Kozlowski <redacted>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 .../memory-controllers/ddr/jedec,lpddr2.yaml  | 195 ++++++++++++++++++
 .../memory-controllers/ddr/lpddr2.txt         | 102 ---------
 2 files changed, 195 insertions(+), 102 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
 delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2.txt
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
new file mode 100644
index 000000000000..d99ccad54938
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
@@ -0,0 +1,195 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
+
+maintainers:
+  - Krzysztof Kozlowski <krzk@kernel.org>
My Canonical address please, so:
Krzysztof Kozlowski [off-list ref]
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - Elpida,ECB240ABACN
+          - enum:
+              - jedec,lpddr2-s4
+      - items:
+          - enum:
+              - jedec,lpddr2-s2
+      - items:
+          - enum:
+              - jedec,lpddr2-nvm
+
+  density:
+    description: |
+      Density in megabits of SDRAM chip. Obtained from device datasheet.
You need here a type/ref, so uint32.
+    enum:
+      - 64
+      - 128
+      - 256
+      - 512
+      - 1024
+      - 2048
+      - 4096
+      - 8192
+      - 16384
+      - 32768
+
+  io-width:
+    description: |
+      IO bus width in bits of SDRAM chip. Obtained from device datasheet.
You need here a type/ref, so uint32.
+    enum:
+      - 32
+      - 16
+      - 8
+
+  tRRD-min-tck:
+    maximum: 16
Here and further type is needed.

+    description: |
+      Active bank a to active bank b in terms of number of clock cycles.
+      Obtained from device datasheet.
+
+  tWTR-min-tck:
+    maximum: 16
+    description: |
+      Internal WRITE-to-READ command delay in terms of number of clock cycles.
+      Obtained from device datasheet.
+
Best regards,
Krzysztof
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