Re: [PATCH v1 1/2] memory: tegra20: Correct comment to MC_STAT registers writes
From: Krzysztof Kozlowski <hidden>
Date: 2021-03-26 07:38:59
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On 25/03/2021 18:20, Dmitry Osipenko wrote:
24.03.2021 00:04, Dmitry Osipenko пишет:quoted
The code was changed multiple times and the comment to MC_STAT registers writes became slightly outdated. The MC_STAT programming now isn't hardcoded to the "bandwidth" mode, let's clarify this in the comment. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/tegra20.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)diff --git a/drivers/memory/tegra/tegra20.c b/drivers/memory/tegra/tegra20.c index 14caf5b9324c..4659c0cea30d 100644 --- a/drivers/memory/tegra/tegra20.c +++ b/drivers/memory/tegra/tegra20.c@@ -451,9 +451,8 @@ static void tegra20_mc_stat_gather(struct tegra20_mc_stat *stat) control_1 = tegra20_mc_stat_gather_control(&stat->gather1); /* - * Reset statistic gathers state, select bandwidth mode for the - * statistics collection mode and set clocks counter saturation - * limit to maximum. + * Reset statistic gathers state, select statistics collection mode + * and set clocks counter saturation limit to maximum. */ mc_writel(mc, 0x00000000, MC_STAT_CONTROL); mc_writel(mc, control_0, MC_STAT_EMC_CONTROL_0);Krzysztof, please feel free to squash these 2 minor follow up patches into the original patch which added the the debug support, if you prefer this way more. I happened to notice these small itches only after you already picked up the previous patch.
No problem, in general I prefer to have incremental improvements. Best regards, Krzysztof