On Mon, Oct 19, 2020 at 09:03:54PM -0700, Sowjanya Komatineni wrote:

VI I2C don't have DMA support and uses PIO mode all the time.

Current driver uses writesl() to fill TX FIFO based on available
empty slots and with this seeing strange silent hang during any I2C
register access after filling TX FIFO with 8 words.

Using writel() followed by i2c_readl() in a loop to write all words
to TX FIFO instead of using writesl() helps for large transfers in
PIO mode.

So, this patch updates i2c_writesl() API to use writel() in a loop
instead of writesl().

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/i2c/busses/i2c-tegra.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

Hi Wolfram,

after discussing a bit more with Sowjanya, I don't think we're going to
have a better solution than this. It should be fairly harmless to have
this additional flushing read of the interrupt status register because
the reads don't have any side-effects (the register is write-1-to-clear)
and these write loops don't happen very often (or when they do we tend
to use DMA anyway), so:

Acked-by: Thierry Reding <redacted>

I did notice that for some reason Sowjanya hadn't listed you as a
recipient, so perhaps you don't have this anywhere in your inbox. I've
quoted the patch fully for reference below and the patchwork link for
this is:

	https://patchwork.ozlabs.org/project/linux-i2c/patch/1603166634-13639-1-git-send-email-skomatineni@nvidia.com/

If you'd prefer to have this in your inbox for proper review, please
let us know so that Sowjanya can resend this.

Thanks,
Thierry