[PATCH AUTOSEL 4.14 151/371] spi: tegra114: terminate dma and reset on transfer timeout
From: Sasha Levin <hidden>
Date: 2020-01-16 18:28:46
Also in:
linux-spi, lkml, stable
Subsystem:
spi subsystem, tegra spi driver, the rest · Maintainers:
Mark Brown, Laxman Dewangan, Linus Torvalds
From: Sowjanya Komatineni <redacted> [ Upstream commit 32bd1a9551cae34e6889afa235c7afdfede9aeac ] Fixes: terminate DMA and perform controller reset on transfer timeout to clear the FIFO's and errors. Signed-off-by: Sowjanya Komatineni <redacted> Signed-off-by: Mark Brown <redacted> Signed-off-by: Sasha Levin <redacted> --- drivers/spi/spi-tegra114.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index c6674b01e0fd..4878d5e00c66 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c@@ -869,7 +869,16 @@ static int tegra_spi_transfer_one_message(struct spi_master *master, if (WARN_ON(ret == 0)) { dev_err(tspi->dev, "spi transfer timeout, err %d\n", ret); + if (tspi->is_curr_dma_xfer && + (tspi->cur_direction & DATA_DIR_TX)) + dmaengine_terminate_all(tspi->tx_dma_chan); + if (tspi->is_curr_dma_xfer && + (tspi->cur_direction & DATA_DIR_RX)) + dmaengine_terminate_all(tspi->rx_dma_chan); ret = -EIO; + reset_control_assert(tspi->rst); + udelay(2); + reset_control_deassert(tspi->rst); goto complete_xfer; }
--
2.20.1