On Wednesday 08 August 2012 01:21 PM, Laxman Dewangan wrote:

The Tegra's i2c controller required two clock sources for proper
operation named as div-clk and fast-clk.

Adding support to make sure that driver will get these clocks and
enable before any transfer and disable after transfer completed.

Patch 1 add the entry of fast clock in clock table.
Patch 2 modify i2c driver to get the div and fast clock.
Patch 3 name the connection of the clock entry.
Patch 4 removes non-required entry from tegra20 clock table.

Hi Wolfram/Stephen,
This patch series very much depends on the common clock changes happens 
on Tegra tree and I think it should go in Tegra common clock tree.

Thanks,
Laxman