Thread (7 messages) 7 messages, 3 authors, 2012-03-08

RE: [PATCH v2] i2c: tegra: Add delay before reset the controller

From: Alok Chauhan <hidden>
Date: 2012-02-10 09:20:32
Also in: linux-i2c, lkml

On Mon, Dec 26, 2011 at 04:44:41PM +0530, Alok Chauhan wrote:
quoted
+	/*
+	 * In NACK error condition resetting of I2C controller happens
+	 * before STOP condition is properly completed by I2C controller,
+	 * so wait for 2 clock cycle to complete STOP condition.
+	 */
+	if (i2c_dev->msg_err == I2C_ERR_NO_ACK)
+		udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
+
Is a delay here good, would it be better to sleep so that some other process can gain cpu time?
quoted
We mostly used 100 khz i2c clock frequency and delay in that case will be 20 usec. Would it be ok to sleep for such a smaller time? Won't it increase any other overhead?
Please let me know if sleep is better option here instead of waiting.

Thanks
Alok

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