[RFC 3/5] media: hantro: Rename ROCKCHIP_VPU_ENC_FMT to HANTRO_VPU_ENC_FMT
From: Adam Ford <hidden>
Date: 2021-11-06 18:38:45
Also in:
linux-arm-kernel, linux-devicetree, linux-media, linux-rockchip, lkml
Subsystem:
arm/rockchip soc support, media input infrastructure (v4l/dvb), staging subsystem, the rest · Maintainers:
Heiko Stuebner, Mauro Carvalho Chehab, Greg Kroah-Hartman, Linus Torvalds
The H1 encoder used on some Rockchip devices appears to be the same or similar H1 encoder used on the i.MX8M Mini, so let's rename the supported formats to a more generic term like HANTRO_VPU_ENC_FMT. There are no functional changes. Signed-off-by: Adam Ford <redacted> --- drivers/staging/media/hantro/hantro_hw.h | 16 ++++++------ .../staging/media/hantro/rockchip_vpu_hw.c | 26 +++++++++---------- 2 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index ae7c3fff760c..c276ecd57066 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h@@ -199,16 +199,16 @@ struct hantro_codec_ops { /** * enum hantro_enc_fmt - source format ID for hardware registers. * - * @ROCKCHIP_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format - * @ROCKCHIP_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format - * @ROCKCHIP_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV) - * @ROCKCHIP_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY) + * @HANTRO_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format + * @HANTRO_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format + * @HANTRO_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV) + * @HANTRO_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY) */ enum hantro_enc_fmt { - ROCKCHIP_VPU_ENC_FMT_YUV420P = 0, - ROCKCHIP_VPU_ENC_FMT_YUV420SP = 1, - ROCKCHIP_VPU_ENC_FMT_YUYV422 = 2, - ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3, + HANTRO_VPU_ENC_FMT_YUV420P = 0, + HANTRO_VPU_ENC_FMT_YUV420SP = 1, + HANTRO_VPU_ENC_FMT_YUYV422 = 2, + HANTRO_VPU_ENC_FMT_UYVY422 = 3, }; extern const struct hantro_variant imx8mm_vpu_g2_variant;
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
index d4f52957cc53..7c8dc211dbc8 100644
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c@@ -21,26 +21,26 @@ * Supported formats. */ -static const struct hantro_fmt rockchip_vpu_enc_fmts[] = { +static const struct hantro_fmt HANTRO_VPU_ENC_FMTS[] = { { .fourcc = V4L2_PIX_FMT_YUV420M, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420P, }, { .fourcc = V4L2_PIX_FMT_NV12M, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420SP, }, { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUYV422, }, { .fourcc = V4L2_PIX_FMT_UYVY, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422, + .enc_fmt = HANTRO_VPU_ENC_FMT_UYVY422, }, { .fourcc = V4L2_PIX_FMT_JPEG,
@@ -478,8 +478,8 @@ const struct hantro_variant rk3036_vpu_variant = { */ const struct hantro_variant rk3066_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3066_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts),
@@ -498,8 +498,8 @@ const struct hantro_variant rk3066_vpu_variant = { const struct hantro_variant rk3288_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3288_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts),
@@ -534,8 +534,8 @@ const struct hantro_variant rk3328_vpu_variant = { const struct hantro_variant rk3399_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3399_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
@@ -551,8 +551,8 @@ const struct hantro_variant rk3399_vpu_variant = { const struct hantro_variant px30_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3399_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
--
2.32.0