Re: [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window

[PATCH 0/6] MIPS: ralink: fix PCI IO resources · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
[PATCH 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
[PATCH 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
Re: [PATCH 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" · Arnd Bergmann <arnd@arndb.de> · 2021-09-25
[PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
Re: [PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' · Arnd Bergmann <arnd@arndb.de> · 2021-09-25
[PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
Re: [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' · Arnd Bergmann <arnd@arndb.de> · 2021-09-25
Re: [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-25
Re: [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' · Arnd Bergmann <arnd@arndb.de> · 2021-09-25
Re: [PATCH 5/6] MIPS: implement architecture dependent 'pci_remap_iospace()' · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-25
[PATCH 4/6] PCI: allow architecture specific implementation of pci_remap_iospace() · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
Re: [PATCH 4/6] PCI: allow architecture specific implementation of pci_remap_iospace() · Bjorn Helgaas <helgaas@kernel.org> · 2021-09-25
Re: [PATCH 4/6] PCI: allow architecture specific implementation of pci_remap_iospace() · Arnd Bergmann <arnd@arndb.de> · 2021-09-25
[PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window · Sergio Paracuellos <sergio.paracuellos@gmail.com> · 2021-09-24
Re: [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window · Arnd Bergmann <arnd@arndb.de> · 2021-09-25

From: Arnd Bergmann <arnd@arndb.de>
Date: 2021-09-25 17:33:26
Also in: linux-mips, linux-pci, lkml

On Fri, Sep 24, 2021 at 11:11 PM Sergio Paracuellos
[off-list ref] wrote:

The value to adjust in the bridge register RALINK_PCI_IOBASE must take into
account the raw value from DT, not only the translated linux port number.
As long as io_offset is zero, the two are the same, but if you were to use
multiple host bridge in the system, or pick a different bus address in DT,
you can have a nonzero io_offset. At this means to take into account the
bus address which is used to calculate this offset, substracting it from
the IO resource start address.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Acked-by: Arnd Bergmann <arnd@arndb.de>

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