On Tue, Feb 15, 2011 at 03:26:53PM +0800, Jeremy Kerr wrote:
Hi Saravana,
quoted
Sure, one could argue that in some archs for a certain set of clocks the
slow stuff in prepare/unprepare won't need to be done during set rate --
say, a simple clock that always runs off the same PLL but just has a
integer divider to change the rate.
In those cases, not grabbing the prepare_lock would make the code less
"locky".
quoted
We
may even want to disallow set_rate (and set_parent) when prepare_count is
non- zero.
This is definitely not right.
Why is that? Consider two devices using one clock; one does some
initialisation based on the return value of clk_get_rate(), the other calls
clk_set_rate() some time later. Now the first device is incorrectly
initialised.
What about a clock sourced from a PLL which provides the dotclock for a
framebuffer device? On every mode set, should the clk have to be disabled,
unprepared, rate set, re-prepared and re-enabled?