[PATCH 1/2] soc: qcom: geni-se: Correct QUP Core ICC vote constants
From: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Date: 2026-09-08 19:05:48
Also in:
linux-arm-msm, lkml
Subsystem:
arm/qualcomm mailing list, arm/qualcomm support, the rest · Maintainers:
Bjorn Andersson, Konrad Dybcio, Linus Torvalds
The GENI_TO_CORE ("qup-core") ICC vote selects the QUP Core 2X clock
rate. The CORE_2X_*_MHZ constants are expressed in Bps, but their
values are several orders of magnitude too small. For example, the
50 MHz threshold is represented by 2500 rather than 25000000 Bps.
As a result, clients using these constants can severely under-vote the
QUP Core clock.
Correct the constants to their intended Bps thresholds so that the ICC
provider selects the corresponding QUP Core 2X clock rate.
Fixes: 58ffbba6a399 ("soc: qcom: geni: Support for ICC voting")
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
---
include/linux/soc/qcom/geni-se.h | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h
index 29a53bbc0dd4..2243005f5e2e 100644
--- a/include/linux/soc/qcom/geni-se.h
+++ b/include/linux/soc/qcom/geni-se.h@@ -347,17 +347,18 @@ struct geni_se { #define QUP_SE_VERSION_2_5 0x20050000 /* - * Define bandwidth thresholds that cause the underlying Core 2X interconnect - * clock to run at the named frequency. These baseline values are recommended - * by the hardware team, and are not dynamically scaled with GENI bandwidth - * beyond basic on/off. + * ICC bandwidth values in Bps for the GENI_TO_CORE ("qup-core") path. + * Convert them with Bps_to_icc() before setting avg_bw. The QUP ICC provider + * maps each threshold to the Core 2X rate named by the macro suffix. + * + * These values are core clock votes, not GENI transfer bandwidths. */ -#define CORE_2X_19_2_MHZ 960 -#define CORE_2X_50_MHZ 2500 -#define CORE_2X_100_MHZ 5000 -#define CORE_2X_150_MHZ 7500 -#define CORE_2X_200_MHZ 10000 -#define CORE_2X_236_MHZ 16383 +#define CORE_2X_19_2_MHZ 9600000 +#define CORE_2X_50_MHZ 25000000 +#define CORE_2X_100_MHZ 50000000 +#define CORE_2X_150_MHZ 75000000 +#define CORE_2X_200_MHZ 100000000 +#define CORE_2X_236_MHZ 118000000 #define GENI_DEFAULT_BW Bps_to_icc(1000)
--
2.34.1