Re: [PATCH 01/16] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-05-21 13:23:57
Also in:
linux-arm-kernel, linux-clk, linux-devicetree, linux-renesas-soc, lkml
Hi Prabhakar, On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar [off-list ref] wrote:
Add device tree bindings documentation for Renesas RZ/G2UL SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Chris Paterson <redacted>
Thanks for your patch!
quoted hunk ↗ jump to hunk
--- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml@@ -302,6 +302,12 @@ properties: - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) - const: renesas,r9a06g032 + - description: RZ/G2UL (R9A07G043) + items: + - enum: + - renesas,r9a07g043u11 # Single Cortex-A55 RZ/G2UL
Is there any specific reason you're including the final "1", unlike the
RZ/G2{L,LC} binding?
As RZ/G2UL is always single-core, perhaps this compatible value can be
dropped?
+ - const: renesas,r9a07g043 + additionalProperties: true
For now, there are no users of this binding?
I assume you're posting it already, as RZ/G2UL is pin-compatible with RZ/G2LC,
and thus can be used interchangeably on the G2L SOM?
However, the DTS board part in this series is for RZ/G2L, not RZ/GLC?
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.14, after the above have been
resolved.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds