From: Lucas Stach <l.stach@pengutronix.de> Sent: 2018年9月20日 18:42

Am Donnerstag, den 20.09.2018, 10:33 +0000 schrieb Andy Duan:

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From: Lucas Stach <l.stach@pengutronix.de> Sent: 2018年9月20日

17:40

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Am Donnerstag, den 20.09.2018, 08:39 +0000 schrieb Robin Gong:

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-----Original Message-----
From: Uwe Kleine-König <redacted>
Sent: 2018年9月20日 15:55
To: Robin Gong <redacted>
Cc: jslaby@suse.com; Andy Duan <redacted>;
linux-serial@vger.kernel.org; linux-kernel@vger.kernel.org; dl-
linux-imx [off-list ref]; kernel@pengutronix.de
Subject: Re: [PATCH v1] tty: serial: imx: enable IDDMAEN for the
last tail data

Hello,

On Thu, Sep 20, 2018 at 11:26:00PM +0800, Robin Gong wrote:

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enable IDDMAEN in UCR4 to let sdma script has the chance to
detect the idle status and transfer the last tail data with
the interrupt notifying uart driver.Otherwise, the last dma
done interrupt of the tail data in rxfifo whose size is less
than watermark may never be received by uart driver.

Is this a theoretic issue? Or does it fix a real problem?

If the former I'd say UCR1_ATDMAEN being set should prevent this
stall.

It's a real fix, you will see 'timeout We read 0 byte' with the
attached stress test running on i.mx7d or i.mx6 if no this patch
applied.
' while [ 1 ]; do /unit_tests/UART/mxc_uart_stress_test.out
/dev/ttymxc5 2000000 D L 100 100 L; done &'
Please make sure dma enabled on ttymxcX for your test, and sdma
firmware setup in your rootfs /lib/firmware/imx/sdma/sdma-
imx6q.bin

or

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/lib/firmware/imx/sdma/sdma- imx7d.bin.
You can get sdma firmware from below:

https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2F

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.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2

Flin

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firmware.git/tree/imx/sdma

Please see commit 905c0decad28402aa166975023fb88c8f62f93c8

on why

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using the idle detect together with with SDMA is wrong. We don't
want to re- introduce the broken behavior.

The patch just want to use idle timer to stop SDMA transfer using the
new ram script, whose action is not the same as rom script.
Sdma rom script how to stop sdma transfer if only one byte in rx FIFO
that trigger SDMA request ?

Right, and using the idle detect doesn't work with the ROM script as this
doesn't read the remaining bytes in the FIFO when the idle detect
condition is hit.

Instead with the ROM script the aging timer is used to terminate the DMA
transfer. So if 1 byte is sitting in the FIFO below the watermark level, the
serial core will trigger a DMA request when the aging time is hit. The ROM
script checks the aging status and reads the remaining bytes from the FIFO,
then terminates the transfer. This is all documented in the reference
manual.

I fail to see why this shouldn't work with the RAM script. If it doesn't work
with the RAM firmware, this script is violating the interface between the
serial core and the script in an incompatible way and needs fixing.

If rom script stop DMA transfer when SDMA is triggered by aging timer,  then idler timer is not needed. And the data copy action should have no problem. I will do stress test with SDMA rom script.
For ram script, there have many changes and different action with rom script. Aging timer trigger cannot stop current SDMA transfer, so use idler timer as the stop condition trigger source. 
We will do more test on rom script, if pass our all test cases, we can align ram script with rom script.
Thanks.

Andy