Thread (1 message) 1 message, 1 author, 2018-03-14
STALE3097d REVIEWED: 1 (0M)

Revision v2 of 2 in this series; 1 review trailer.

Revisions (2)
  1. v2 current
  2. v3 [diff vs current]

[PATCH v2 1/3] serial: 8250_early: Add earlycon support for AMD Carrizo / Stoneyridge

From: Daniel Kurtz <hidden>
Date: 2018-03-14 21:44:36
Also in: lkml
Subsystem: 8250/16?50 (and clone uarts) serial driver, the rest, tty layer and serial drivers · Maintainers: Greg Kroah-Hartman, Linus Torvalds, Jiri Slaby

AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a 48 MHz
input clock.

Allow these platforms to set up this clock by specifying a kernel command
line like:
earlycon=amdcz,mmio32,0xfedc6000,115200

Signed-off-by: Daniel Kurtz <redacted>
Suggested-by: Andy Shevchenko <redacted>
Reviewed-by: Andy Shevchenko <redacted>
---
 drivers/tty/serial/8250/8250_early.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
index ae6a256524d8..c6bf971a6038 100644
--- a/drivers/tty/serial/8250/8250_early.c
+++ b/drivers/tty/serial/8250/8250_early.c
@@ -195,3 +195,18 @@ static int __init early_au_setup(struct earlycon_device *dev, const char *opt)
 OF_EARLYCON_DECLARE(palmchip, "ralink,rt2880-uart", early_au_setup);
 
 #endif
+
+#ifdef CONFIG_SERIAL_8250_DW
+static int __init early_amdcz_setup(struct earlycon_device *dev,
+				    const char *opt)
+{
+	struct uart_port *port = &dev->port;
+
+	port->uartclk = 48000000;
+
+	return early_serial8250_setup(dev, opt);
+}
+
+EARLYCON_DECLARE(amdcz, early_amdcz_setup);
+
+#endif
-- 
2.16.2.804.g6dcf76e118-goog
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