Hi Piotr,

On Tue, Feb 21, 2017 at 5:48 AM, Piotr Figiel
[off-list ref] wrote:

I'm not sure if it's best idea, I don't know if the UART will keep
triggering the interrupt if the source won't be cleared (FIFO drained), but
if it does we'll be irq flooded, if it doesn't there will be old contents in
the RX fifo no-one will touch until some other interrupt (other than TX fifo
empty, as at that time RXEN would still be 0) comes. RX fifo could be
alternatively cleaned somewhere else, this is actually question I raise in
my initial e-mail.

How does the half-duplex RS485 problem manifest in practice?

Do you think the issue you see is similar to what Clemens reported at:
https://lkml.org/lkml/2017/1/4/579 ?

Also, could you try kernel 4.10 instead of 3.10 so that we are all in
the same code base?

Thanks