Hi Bart,

REG_UFS_MTK_HW_VER is a read only mediatek dedicated register.
So, hw_ver will get a const value for mediatek to decide how to use
debug select. It only need read once, no need multi-threads protected.

Thanks
Peter


On Mon, 2021-08-30 at 19:47 -0700, Bart Van Assche wrote:

On 8/30/21 05:11, peter.wang@mediatek.com wrote:

quoted

+static void ufs_mtk_dbg_sel(struct ufs_hba *hba)
+{
+	static u32 hw_ver;
+
+	if (!hw_ver)
+		hw_ver = ufshcd_readl(hba, REG_UFS_MTK_HW_VER);
+
+	if (((hw_ver >> 16) & 0xFF) >= 0x36) {
+		ufshcd_writel(hba, 0x820820, REG_UFS_DEBUG_SEL);
+		ufshcd_writel(hba, 0x0, REG_UFS_DEBUG_SEL_B0);
+		ufshcd_writel(hba, 0x55555555, REG_UFS_DEBUG_SEL_B1);
+		ufshcd_writel(hba, 0xaaaaaaaa, REG_UFS_DEBUG_SEL_B2);
+		ufshcd_writel(hba, 0xffffffff, REG_UFS_DEBUG_SEL_B3);
+	} else {
+		ufshcd_writel(hba, 0x20, REG_UFS_DEBUG_SEL);
+	}
+}

Can ufs_mtk_dbg_sel() be called from multiple threads at the same
time? 
Does the 'hw_ver' variable need to be protected against concurrent
writes?

Thanks,

Bart.