Re: rtc-pcf8563: STOP bit usage during time update?
From: Alexandre Belloni <alexandre.belloni@bootlin.com>
Date: 2021-10-25 10:25:41
On 25/09/2021 09:00:00+0200, David Müller (ELSOFT AG) wrote:
According to the example on page 30 of the EPSON datasheet https://support.epson.biz/td/api/doc_check.php?dl=app_RTC-8564JE&lang=en for the 8564 version of this chip, the time update sequence is as follows: - set CTRLSTS1[STOP] bit to 1 - update time registers - set CTRLSTS1[STOP] bit to 0 The NXP datasheet is not so explicit regarding STOP bit handling. Nevertheless I don't see any STOP bit related action in the driver: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/rtc/rtc-pcf8563.c?h=v5.14#n244 Am I overlooking or missing something here?
You are not missing anything, the driver is not stopping the clock while updating it. The hym8563 driver (which is compatible) does it. -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com