Hello,

Le ven. 6 août 2021 à 21:38, Alexandre Belloni
[off-list ref] a écrit :

Hello,

On 01/08/2021 18:09:20+0200, Romain Perier wrote:

quoted

+static int msc313_rtc_probe(struct platform_device *pdev)
+{
+     struct device *dev = &pdev->dev;
+     struct msc313_rtc *priv;
+     int ret;
+     int irq;
+     unsigned long rate;
+     u16 reg;
+
+     priv = devm_kzalloc(&pdev->dev, sizeof(struct msc313_rtc), GFP_KERNEL);
+     if (!priv)
+             return -ENOMEM;
+
+     priv->rtc_base = devm_platform_ioremap_resource(pdev, 0);
+     if (IS_ERR(priv->rtc_base))
+             return PTR_ERR(priv->rtc_base);
+
+     irq = platform_get_irq(pdev, 0);
+     if (irq < 0)
+             return -EINVAL;
+
+     priv->rtc_dev = devm_rtc_allocate_device(dev);
+     if (IS_ERR(priv->rtc_dev))
+             return PTR_ERR(priv->rtc_dev);
+
+     priv->rtc_dev->ops = &msc313_rtc_ops;
+     priv->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_0000;

I'm pretty sure this doesn't fit in this RTC registers, you should
probably leave range_min to 0 (i.e. not set it at all).

ack

quoted

+     priv->rtc_dev->range_max = U32_MAX - 1; /* 2106-02-07 06:28:14 */

I guess this one should be U32_MAX

ack

quoted

+
+     ret = devm_request_irq(dev, irq, msc313_rtc_interrupt, IRQF_SHARED,
+                            dev_name(&pdev->dev), &pdev->dev);
+     if (ret) {
+             dev_err(dev, "Could not request IRQ\n");
+             return ret;
+     }
+
+     priv->clk = devm_clk_get(dev, NULL);
+     if (IS_ERR(priv->clk)) {
+             dev_err(dev, "No input reference clock\n");
+             return PTR_ERR(priv->clk);
+     }
+
+     ret = clk_prepare_enable(priv->clk);
+     if (ret) {
+             dev_err(dev, "Failed to enable the reference clock, %d\n", ret);
+             return ret;
+     }
+
+     ret = devm_add_action_or_reset(dev, (void (*) (void *))clk_disable_unprepare, priv->clk);
+     if (ret)
+             return ret;
+
+     rate = clk_get_rate(priv->clk);
+     writew(rate & 0xFFFF, priv->rtc_base + REG_RTC_FREQ_CW_L);
+     writew((rate >> 16) & 0xFFFF, priv->rtc_base + REG_RTC_FREQ_CW_H);
+
+     reg = readw(priv->rtc_base + REG_RTC_CTRL);
+     reg |= CNT_EN_BIT;
+     writew(reg, priv->rtc_base + REG_RTC_CTRL);
+

If on POR, CNT_EN_BIT is not set, then it would be nice to use that to
know whether the RTC is properly set. You can then check CNT_EN_BIT in
.read_time and return -EINVAL if it is not set. Then you can set the bit
in .set_time. It is anyway useless to let the RTC running if it is not
set.

Yeah, this is to be sure that the RTC is alive with a valid value
(which makes sense).
Ok I will fix everything in v3, then.

Romain